Ed Deprettere
Professor emeritus of Information technology
- Name
- Prof.dr.ir. E.F.A. Deprettere
- Telephone
- +31 71 527 4799
- e.f.a.deprettere@liacs.leidenuniv.nl
Professor emeritus of Information technology
- Science
- Leiden Inst of Advanced Computer Science
- Keinert J. & Deprettere E.F.A. (2013), Multidimensional Dataflow Graphs. In: , Handbook of Signal Processing Systems 2013 1145-1175.
- Bhattacharyya S.S., Deprettere E.F.A. & Theelen B.D. (2013), Dynamic Dataflow Graphs. In: , Handbook of Signal Processing Systems 2013 905-944.
- Bhattacharyya S.S., Deprettere E.F.A., Leupers R. & Takala J. (Eds.) (2013), Handbook of Signal Processing Systems: Springer-Verlag.
- Stefanov T.P., Deprettere E.F.A., Marinov M., Popov A. & Nikolov H.N. (2012), Embedded Systems: Components, Modeling, Design and Case Studies. Sofia: TU Sofia Press.
- Rao A., Nikolov H.N., Nandy S.K. & Deprettere E.F.A. (2011), USHA: Unified Software and Hardware Architecture for Video Decoding, Proceedings IEEE Symposium on Application Specific Processors (SASP'11). .
- Bhattacharyya S.S., Deprettere E.F.A., Leupers R. & Takala R. (2010), Handbook of Signal Processing Systems. Heidelberg, Germany: Springer.
- Bhattacharyya S.S., Deprettere E.F.A., Leupers R. & Takala J. (2010), Handbook of Signal Processing Systems. Heidelberg, Berlin, Germany: Springer.
- Bhattacharyya S.S., Deprettere E.F.A. & Keinert J. (2010), Dynamic and Multimdimensional Dataflow. In: , Handbook of Signal Processing Systems: Springer. 899-930.
- Deprettere E.F.A. (2010), How fast can fast prototyping be?, Proceedings IEEE Signal Processing Workshop. .
- Nikolov H.N., Rao A., Deprettere E.F.A., Nandy S.K. & Narayan R.S. (2009), A.H.264 Decoder: A Design Style Comparison Case Study, Proceedings IEEE International Asilomar Conference on Signals, Systems and Computers. 236-242.
- Nadezhkin D., Meijer S., Stefanov T.P. & Deprettere E.F.A. (2009), Realizing FIFO Communication when Mapping Kahn Process Networks onto Cellular Architectures, Modeling and Simulation, Proceedings 9th Int. Symposium en Embedded Computer Systems. 9th Int. Symposium en Embedded Computer Systems (SAMOS 2009) 308-317.
- Nikolov H.N., Stefanov T.P. & Deprettere E.F.A. (2009), Run-time Reconfiguration of Polyhedral Process Networks Implementations, Proceedings 17th International Conference on Advanced Computing and Communications (ADCOM'09). .
- Derrien S., Turjan A., Zissulescu C., Kienhuis A.C.J. & Deprettere E.F.A. (2008), Deriving efficient controlin Process Networks with Compaan/Laura, International Journal of Embedded Systems 3(3): 170-180.
- Nikolov H.N., Stefanov T.P. & Deprettere E.F.A. (2008), Systematic and Automated Multiprocessor System Design, Programming, and Implementation, IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 542-555.
- Deprettere E.F.A., Woods R., Verbauwhede I. & Kock E. de (2008), Transforming Signal Processing Applications into Parallel Implementation, EURASIP Journal on Advances in Signal Processing 2007: .
- Nikolov H.N. & Deprettere E.F.A. (2008), Parameterized Stream-Based Functions Dataflow Model of Computation, Proceedings ODES 08, Boston. Workshop on Optimizations for DSP and Embedded Systems.
- Pimentel A., Stefanov T.P., Nikolov H.N., Thompson M., Polstra S. & Deprettere E.F.A. (2008), Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study, Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation. . Heidelberg: Springer Verlag. 167-176.
- Nikolov H.N., Thompson M., Stefanov T.P., Pimentel A., Polstra S., Bose R., Zissulescu C. & Deprettere E.F.A. (2008), Daedalus: toward composable multimedia MP-SoC design, Proceedings of the 45th annual conference on Design automation. Annual ACM IEEE Design Automation Conference. New York: ACM. 574-579.
- Jiang B., Deprettere E.F.A. & Kienhuis A.C.J. (2008), Hierarchical Run Time Deadlock Detection in Process Networks, Proceedings of the IEEE workshop on Signal Processing Systems. 239-244.
- Nikolov H.N., Stefanov T.P. & Deprettere E.F.A. (2008), Automated Integration of Dedicated Hardwired IP Cores in Heterogeneous MPSoCs Designed with ESPAM, International Journal of Embedded Systems 2008: .
- Ko M.-Y., Zissulescu C., Puthenpurayil N., Bhattacharrya S.S., Kienhuis A.C.J. & Deprettere E.F.A. (2007), Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation, IEEE Transactions on Signal Processing 55(6): 3126-3138.
- Thompson M., Nikolov H.N., Stefanov T.P., Pimentel A., Erbas C., Polstra S. & Deprettere E.F.A. (2007), A Framework for Rapid System-level Exploration, Synthesis, and Programming of Multimedia MP-SoCs, Proceedings of the 5th IEEE/ACM/IFIP Int. Conf. on HW/SW Codesign and System Synthesis (CODES-ISSSS'07). . Salzburg 9-14.
- Nikolov H.N., Stefanov T.P. & Deprettere E.F.A. (2007), Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips, Proceedings 17th Int. Conf. on Field Programmable Logic and Applicationsi. 580-584.
- Huang K., Thiele L., Stefanov T.P. & Deprettere E.F.A. (2007), Performance Analysis of Multimedia Applications using Correlated Streams, Proceedings 10th Int. Conf. Design, Automation and Test in Europe. 912-917.
- Lemaitre J., Alliot S. & Deprettere E.F.A. (2006), Requirements for Interfacing IP-Components in Re-configurable Platforms, Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 43: 173-184.
- Ko M., Zissulescu C., Puthenpurayil S., Bhattacharyya S.S., Kienhuis A.C.J. & Deprettere E.F.A. (2006), Parameterized Looped Schedules for Compact Representation of Execution Sequences, Proceedings of the International Conference on Application Specific Systems, Architectures, and Processors. 223-230.
- Lemaitre J. & Deprettere E.F.A. (2006), FPGA Implementation of a Hierarchical Control Network for Large-Scale Signal, ACM/IEEE European Conf. on Parallel Computing (EURO-PAR'06). .
- Deprettere E.F.A., Stefanov T.P., Bhattacharyya S.S. & Sen M. (2006), Affine Nested Loop Programs and their Binary Cyclo-Static Dataflow Counterparts, Proceedings of the International Conference on Application Specific Systems, Architectures, and Processors. 186-190.
- Nikolov H.N., Stefanov T.P. & Deprettere E.F.A. (2006), Efficient Automated Synthesis, Programming, and Implementation of Multi-processor Platforms on FPGA Chips, Int. Conference on Field Programmable Logic and Applications. FPL'06 323-328.
- Nikolov H.N., Stefanov T.P. & Deprettere E.F.A. (2006), Multi-processor System Design with ESPAM, 4th IEEE/ACM/IFIP Int. Conf. on HW/SW Codesign and System Synthesis. CODES-ISSS'06 211-216.
- Alliot S. & Deprettere E.F.A. (2005), The communication mechanism in a generic platform, Proceedings ProRISC Annual Workshop on Circuits, Systems and Signal Processing. 332-337.
- Cristea M.L., Zissulescu C., Deprettere E.F.A. & Bos H.J. (2005), FPL-3: towards language support for reconfigurable packet processing, Proceedings of SAMOS V - Systems Architectures, Modeling, and Simulation. 82-92.
- Zissulescu C., Kienhuis A.C.J. & Deprettere E.F.A. (2005), Expression Synthesis in Process Networks generated by LAURA, Proceedings IEEE 16th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2005). : IEEE Computer Society. 15-21.
- Zissulescu C., Kienhuis A.C.J. & Deprettere E.F.A. (2005), Communication Synthesis in a multiprocessor environment, Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL 2005). 360-365.
- Nikolov H.N., Stefanov T.P. & Deprettere E.F.A. (2005), Modeling and FPGA Implementation of Applications using Parameterized Process Networks with Non-Static Parameters, Proceedings of the 13th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM'05). : IEEE Computer Society. 255-263.
- Lemaitre J., Alliot S. & Deprettere E.F.A. (2005), Behavioral specification of control interface for signal processing applications, Proceedings IEEE 16th International Conference on Application-specific Systems, Architectures and Processors. : IEEE Computer Society. 43-49.
- Turjan A., Kienhuis A.C.J. & Deprettere E.F.A. (2005), Solving Out-of-Order Communication in Kahn Process Networks, Journal of VLSI Signal Processing 40(1): 7-18.